TY  - BOOK
AU  - Kamakoti, V. and Balachandran, Shankar
TI  - CAD for VLSI Design II: : Flip Flop and Latch optimaztion
U1  - 004 
CY  - IIT Madras
PB  - ; Indian Institute of Technology Madras
KW  - Flip Flop and Latch optimaztion
KW  - CAD for VLSI Design II
KW  - Computer Science & Engineering
KW  - NPTEL
KW  - V. Kamakoti and Shankar Balachandran
KW  - IIT Madras
UR  - http://nptel.ac.in/courses/IIT-MADRAS/CAD_for_VLSI_Design_II/pdf/nptel-cad2-15.pdf
ER  -