TY  - BOOK
AU  - Malik, Aditi
TI  - Project on logical placer:An evolutionary approach for optimized standard cell placement in VLSI physical design automation. 
PY  - 2015///
CY  - .-Shiv Nadar University,Dadri
PB  - :Department of Electrical Engineering
KW  - Project Report
KW  -  Electrical Engineering
ER  -