TY  - BOOK
AU  - Palnitkar, Samir
AU  - ; Goel, Prabhu.
AU  - Samir Palnitkar
TI  - Verilog HDL: : a guide to digital design and synthesis, IEEE 1364-2001 complaint
SN  - 9788177589184
U1  - 621.392 PAL 
PY  - 2022///
CY  - , Noida
PB  -  : Pearson
KW  - Verilog
KW  - HDL
KW  - Degital Design
ER  -