00481nam a2200109Ia 4500008004100000100004000041245005300081260010000134300001500234650007900249700004300328250624s9999||||xx |||||||||||||| ||und||  aAnvita Yalamanchili;Akanksha Goenka 0aDesign of reconfigurable cache memory controller  aShiv Nadar University, DadribDepartment of Electrical Engineering, School of Engineeringc2025  a57p.c26cm  aEngineeringElectrical EngineeringElectronics and Communication Engineering  aUnder supervision of Dr. Sonal Singhal