<?xml version="1.0" encoding="utf-8" ?> <rss version="2.0" xmlns:opensearch="http://a9.com/-/spec/opensearch/1.1/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"> <channel> <title> <![CDATA[SNU Library Search for 'index-term-genre:&quot; Circuits&quot;']]> </title> <link> https://library.snu.edu.in/cgi-bin/koha/opac-search.pl?q=ccl=index-term-genre%3A%22%20Circuits%22&#38;sort_by=&#38;format=rss </link> <atom:link rel="self" type="application/rss+xml" href="https://library.snu.edu.in/cgi-bin/koha/opac-search.pl?q=ccl=index-term-genre%3A%22%20Circuits%22&#38;sort_by=&#38;format=rss"/> <description> <![CDATA[ Search results for 'index-term-genre:&quot; Circuits&quot;' at SNU Library]]> </description> <opensearch:totalResults>136</opensearch:totalResults> <opensearch:startIndex>0</opensearch:startIndex> <opensearch:itemsPerPage>50</opensearch:itemsPerPage> <atom:link rel="search" type="application/opensearchdescription+xml" href="https://library.snu.edu.in/cgi-bin/koha/opac-search.pl?q=ccl=index-term-genre%3A%22%20Circuits%22&#38;sort_by=&#38;format=opensearchdescription"/> <opensearch:Query role="request" searchTerms="q%3Dccl%3Dindex-term-genre%253A%2522%2520Circuits%2522" startPage="" /> <item> <title> Printed Circuit Boards Design and Technology </title> <dc:identifier>ISBN:9780074515495</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=96</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0074515497.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bosshart, Walter C.<br /> New Delhi TMH 2010 .<br /> xxiii;467p. 9780074515495 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=96">Place hold on <em>Printed Circuit Boards</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=96</guid> </item> <item> <title> Basic Electrical Engineering </title> <dc:identifier>ISBN:9780070146112</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=430</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/007014611X.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Kothari, D P | Nagrath, I J .<br /> New Delhi :TMH 2010 .<br /> xv;746p. 9780070146112 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=430">Place hold on <em>Basic Electrical Engineering</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=430</guid> </item> <item> <title> Digital Design </title> <dc:identifier>ISBN:9788131714508 | 978831794746</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=528</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8131714500.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Mano, Morris M. | and Micheal D. Ciletti.<br /> Delhi :Pearson, 2008 .<br /> xv; 623p. 9788131714508 | 978831794746 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=528">Place hold on <em>Digital Design </em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=528</guid> </item> <item> <title> Secrets of RF Circuit Design </title> <dc:identifier>ISBN:9780070593855</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=1049</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/007059385X.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Carr, Joseph J..<br /> New Delhi TMH 2009 .<br /> xii;534p. 9780070593855 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=1049">Place hold on <em>Secrets of RF Circuit Design</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=1049</guid> </item> <item> <title> Op-amps and linear integrated circuits </title> <dc:identifier>ISBN:9788120320581</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=10168</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8120320581.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Gayakwad, Ramakant A..<br /> New Delhi : PHI Learning Privet Limited, 2013 .<br /> xv, 543 p . ; 24 cm..<br /> 9788120320581 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=10168">Place hold on <em>Op-amps and linear integrated circuits</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=10168</guid> </item> <item> <title> The boundary-scan handbook </title> <dc:identifier>ISBN:9781402074967</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11190</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/1402074964.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Parker, Kenneth P..<br /> New York : Kluwer Academic, 2002 .<br /> xxvi, 288 p. ; 24 cm..<br /> 9781402074967 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=11190">Place hold on <em>The boundary-scan handbook</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11190</guid> </item> <item> <title> Mixed signal VLSI wireless design circuits and systems </title> <dc:identifier>ISBN:9780792386872</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11258</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0792386876.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Farag, Emad N. | ; Elmasry, Mohamed I.,.<br /> New York : Kluwer Academic, 2002 .<br /> xxvi, 319 p. ; 24 cm..<br /> 9780792386872 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=11258">Place hold on <em>Mixed signal VLSI wireless design circuits and systems</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11258</guid> </item> <item> <title> Essentials of electronic testing for digital, memory and mixed-signal VLSI circuits </title> <dc:identifier>ISBN:9780792379911</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11513</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0792379918.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Michael L. Bushnell | / Vishwani D. Agrawal.<br /> New York : Kluwer Academic 2002 .<br /> xviii, 690 p. ; 24 cm..<br /> 9780792379911 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=11513">Place hold on <em>Essentials of electronic testing for digital, memory and mixed-signal VLSI circuits</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11513</guid> </item> <item> <title> SystemVerilog for verification : a guide to learning the testbench language features </title> <dc:identifier>ISBN:9780387270364</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11685</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0387270361.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Spear, Chris..<br /> New York, NY : Springer, 2006 .<br /> xxxiv, 301 p. ; 25 cm..<br /> 9780387270364 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=11685">Place hold on <em>SystemVerilog for verification</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11685</guid> </item> <item> <title> Transducer interfacing handbook : a guide to analog signal conditioning </title> <dc:identifier>ISBN:9780916550059</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11750</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0916550052.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Sheingold, Daniel H.<br /> Norwood, Mass. : Analog Devices, 1980 .<br /> xxxv, 231 p. ; 22 cm..<br /> 9780916550059 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=11750">Place hold on <em>Transducer interfacing handbook </em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11750</guid> </item> <item> <title> Altera data book. </title> <dc:identifier>ISBN:</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11851</link> <description> <![CDATA[ <p> By Altera Corporation..<br /> Santa Clara, CA : Altera Corp., 1996 .<br /> Vi, 745p. 23cm. .<br /> </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=11851">Place hold on <em>Altera data book.</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11851</guid> </item> <item> <title> VLSI array processors </title> <dc:identifier>ISBN:013942749x</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11876</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/013942749X.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Kung, S. Y. .<br /> Englewood Cliffs, N.J. : Prentice Hall, 1988 .<br /> xviii, 667 p. ; 25 cm..<br /> 013942749x </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=11876">Place hold on <em>VLSI array processors</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11876</guid> </item> <item> <title> Substrate noise : analysis and optimization for IC design </title> <dc:identifier>ISBN:9780792373254</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11891</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0792373251.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Charbon, Edoardo...[et.al].<br /> Boston : Kluwer Academic Publishers, 2001 .<br /> xvi, 171 p. ; 24 cm..<br /> 9780792373254 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=11891">Place hold on <em>Substrate noise </em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11891</guid> </item> <item> <title> The boundary-scan handbook analog and digital </title> <dc:identifier>ISBN:0792392701</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11893</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0792392701.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Parker, Kenneth P. .<br /> Boston : Kluwer Academic Publishers, 1992 .<br /> xvi, 261 p. ; 25 cm..<br /> 0792392701 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=11893">Place hold on <em>The boundary-scan handbook analog and digital</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11893</guid> </item> <item> <title> Noise reduction techniques in electronic systems </title> <dc:identifier>ISBN:0471657263</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12139</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0471657263.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Ott, Henry W .<br /> New York : Wiley, 1976 .<br /> xviii, 294 p. 24 cm..<br /> 0471657263 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=12139">Place hold on <em>Noise reduction techniques in electronic systems</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12139</guid> </item> <item> <title> Algorithms, complexity analysis, and VLSI architectures for MPEG-4 motion estimation </title> <dc:identifier>ISBN:9780792385165</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12156</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0792385160.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Kuhn, Peter .<br /> Boston : Kluwer Academic Publishers , 1999 .<br /> viii, 239 p. 25 cm..<br /> 9780792385165 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=12156">Place hold on <em>Algorithms, complexity analysis, and VLSI architectures for MPEG-4 motion estimation</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12156</guid> </item> <item> <title> Chip-level modeling with VHDL </title> <dc:identifier>ISBN:0131331906</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12281</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0131331906.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Armstrong, James R..<br /> Englewood Cliffs, N.J. : Prentice Hall, 1989 .<br /> x, 148 p. ; 24 cm..<br /> 0131331906 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=12281">Place hold on <em>Chip-level modeling with VHDL</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12281</guid> </item> <item> <title> Writing testbenches :functional verification of HDL models </title> <dc:identifier>ISBN:9781402074011</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12482</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/1402074018.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bergeron, Janick.<br /> Boston : Kluwer Academic Publishers, 2003 .<br /> xxx, 475 p. ; 25 cm..<br /> 9781402074011 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=12482">Place hold on <em>Writing testbenches </em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12482</guid> </item> <item> <title> Modern VLSI design : a systems approach </title> <dc:identifier>ISBN:9788178086538</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12559</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8178086530.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Wolf,Wayne.<br /> Newdelhi Pearson publications 2003 .<br /> xx, 618 p. ; 24 cm..<br /> 9788178086538 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=12559">Place hold on <em>Modern VLSI design</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12559</guid> </item> <item> <title> CMOS/BiCMOS ULSI : low voltage, low power </title> <dc:identifier>ISBN:9780130321626</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12580</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0130321621.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Yeo, Kiat Seng | ; Goh, Wang Ling | ; Rofail, Samir S.<br /> Upper Saddle River, NJ : Prentice Hall 2002 .<br /> xxv, 585 p. ; 24 cm..<br /> 9780130321626 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=12580">Place hold on <em>CMOS/BiCMOS ULSI </em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12580</guid> </item> <item> <title> Writing testbenches using System Verilog </title> <dc:identifier>ISBN:9780387292212 </dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12595</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0387292217.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bergeron, Janick.<br /> New York : Springer Science+Business Media, 2006 .<br /> xxvi, 412 p. ; 25 cm..<br /> 9780387292212 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=12595">Place hold on <em>Writing testbenches using System Verilog</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12595</guid> </item> <item> <title> Printed circuit board designer&#39;s reference : basics </title> <dc:identifier>ISBN:9780130674814</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12718</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0130674818.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Robertson, Christopher T.<br /> Upper Saddle River, NJ : Prentice Hall Professional Technical Reference 2004 .<br /> xxvi, 264 p. ; 25 cm..<br /> 9780130674814 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=12718">Place hold on <em>Printed circuit board designer&#39;s reference : basics</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12718</guid> </item> <item> <title> Signal integrity issues and printed circuit board design </title> <dc:identifier>ISBN:9780131418844</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12720</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/013141884X.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Brooks, Douglas.<br /> Upper Saddle River, NJ : Prentice Hall 2003 .<br /> xix, 403 p. ; 24 cm..<br /> 9780131418844 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=12720">Place hold on <em>Signal integrity issues and printed circuit board design</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12720</guid> </item> <item> <title> Algorithms for VLSI physical design automation </title> <dc:identifier>ISBN:9780792383932</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13225</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0792383931.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Sherwani, N. A.<br /> United States of america kluwer Academic Publications .<br /> xxx, 572 p. 9780792383932 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13225">Place hold on <em> Algorithms for VLSI physical design automation</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13225</guid> </item> <item> <title> Application-specific integrated circuits </title> <dc:identifier>ISBN:9788178080079</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13235</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8178080079.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Michael John Sebastian Smith.<br /> Reading, Mass. : Addison-Wesley, [2008] 1997 .<br /> 1026 p. ; 24 cm..<br /> 9788178080079 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13235">Place hold on <em>Application-specific integrated circuits</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13235</guid> </item> <item> <title> Open verification methodology cookbook </title> <dc:identifier>ISBN:9781441909688</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13477</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/1441909680.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Glasser, Mark.<br /> New York : Springer, 2009 .<br /> xx, 235 p ; 23cm.<br /> 9781441909688 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13477">Place hold on <em>Open verification methodology cookbook</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13477</guid> </item> <item> <title> Digital design </title> <dc:identifier>ISBN:9788178088372</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13502</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8178088371.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By M Morris Mano.<br /> Upper Saddle River, NJ : Prentice-Hall 2002 .<br /> xii, 516 p. ; 25 cm. .<br /> 9788178088372 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13502">Place hold on <em>Digital design</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13502</guid> </item> <item> <title> Design with operational amplifiers and analog integrated circuits </title> <dc:identifier>ISBN:9780070530447</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13569</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0070530440.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Sergio Franco.<br /> New York : McGraw-Hill 2002 .<br /> xiv, 658 p. ; 25 cm..<br /> 9780070530447 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13569">Place hold on <em>Design with operational amplifiers and analog integrated circuits</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13569</guid> </item> <item> <title> Semiconductor manufacturing handbook </title> <dc:identifier>ISBN:9780071445597</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13605</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0071445595.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Geng, Hwaiyu | ; Albrecht, David J.<br /> New York : McGraw-Hill 2005 .<br /> 1 v. (various pagings) ; 25 cm..<br /> 9780071445597 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13605">Place hold on <em>Semiconductor manufacturing handbook</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13605</guid> </item> <item> <title> Electronic devices and circuits </title> <dc:identifier>ISBN:007Y855056</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13626</link> <description> <![CDATA[ <p> By Jacob Millman | / Christos C Halkias.<br /> New York, McGraw-Hill 1967 .<br /> xv, 752 pages ; 24 cm..<br /> 007Y855056 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13626">Place hold on <em>Electronic devices and circuits</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13626</guid> </item> <item> <title> VLSI memory chip design </title> <dc:identifier>ISBN:9783540678205</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13772</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/3540678204.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Kiyoo Itoh.<br /> Berlin ; New York : Springer 2001 .<br /> xi, 495 p. ; 25 cm..<br /> 9783540678205 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13772">Place hold on <em>VLSI memory chip design</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13772</guid> </item> <item> <title> The ASIC handbook </title> <dc:identifier>ISBN:9780130915580</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13809</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0130915580.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Nigel Horspool | / Peter Gorman.<br /> Upper Saddle River, NJ : Prentice Hall 2001 .<br /> xix, 232 p. ; 25 cm..<br /> 9780130915580 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13809">Place hold on <em>The ASIC handbook</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13809</guid> </item> <item> <title> Skew-tolerant circuit design </title> <dc:identifier>ISBN:9781558606364</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13847</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/155860636X.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By David Harris.<br /> San Francisco : Morgan Kaufmann Publishers 2001 .<br /> (xiv, 223 p.) ; 24 cm..<br /> 9781558606364 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13847">Place hold on <em>Skew-tolerant circuit design</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13847</guid> </item> <item> <title> Principles of CMOS VLSI design : a systems perspective </title> <dc:identifier>ISBN:9788178082226</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13851</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8178082225.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Neil H E Weste | / Kamran Eshraghian.<br /> Reading, Mass. : Addison-Wesley 1985 .<br /> xxii, 531 p., [16] p. of plates ; 24 cm..<br /> 9788178082226 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13851">Place hold on <em>Principles of CMOS VLSI design </em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13851</guid> </item> <item> <title> Design with operational amplifiers and analog integrated circuits </title> <dc:identifier>ISBN:97800470495098</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13884</link> <description> <![CDATA[ <p> By Sergio Franco.<br /> New York : McGraw-Hill 2002 .<br /> xiv, 658 p. ; 25 cm..<br /> 97800470495098 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13884">Place hold on <em>Design with operational amplifiers and analog integrated circuits</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13884</guid> </item> <item> <title> Op-amps and linear integrated circuits </title> <dc:identifier>ISBN:9788178085012</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14011</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8178085011.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Gayakwad, Ramakant A..<br /> Upper Saddle River, N.J. : Prentice Hall, 2000 .<br /> xv, 543 p. ; 24 cm..<br /> 9788178085012 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=14011">Place hold on <em>Op-amps and linear integrated circuits</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14011</guid> </item> <item> <title> The essential guide to semiconductors </title> <dc:identifier>ISBN:9780130464040</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14032</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/013046404X.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By James L Turley.<br /> Upper Saddle River, NJ : Prentice Hall 2003 .<br /> xix, 217 p. ; 24 cm..<br /> 9780130464040 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=14032">Place hold on <em>The essential guide to semiconductors</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14032</guid> </item> <item> <title> Operational amplifiers and linear integrated circuits </title> <dc:identifier>ISBN:9788178083513</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14097</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/8178083515.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Coughlin, Robert F. | ; Driscoll, Frederick F..<br /> Upper Saddle River, N.J. : Prentice Hall 2001 .<br /> xxvii, 529 p. ; 25 cm..<br /> 9788178083513 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=14097">Place hold on <em>Operational amplifiers and linear integrated circuits</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14097</guid> </item> <item> <title> Timing verification of application-specific integrated circuits (ASICs) </title> <dc:identifier>ISBN:9780137943487</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14251</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0137943482.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Nekoogar, Farzad .<br /> Upper Saddle River, NJ : Prentice Hall, 1999 .<br /> xix, 179 p. ; 25 cm..<br /> 9780137943487 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=14251">Place hold on <em>Timing verification of application-specific integrated circuits (ASICs)</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14251</guid> </item> <item> <title> VLSI for wireless communication </title> <dc:identifier>ISBN:9788129704030</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14420</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/812970403X.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bosco Leung.<br /> Upper Saddle River, NJ : Prentice Hall 2002 .<br /> xviii,366 p. ; 27 cm..<br /> 9788129704030 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=14420">Place hold on <em>VLSI for wireless communication</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14420</guid> </item> <item> <title> Analog integrated circuit design </title> <dc:identifier>ISBN:9780471144489</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14441</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0471144487.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By David Johns | / Kenneth W Martin.<br /> New York : John Wiley &amp; Sons 1997 .<br /> xiv, 706 p. ; 25 cm..<br /> 9780471144489 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=14441">Place hold on <em>Analog integrated circuit design</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14441</guid> </item> <item> <title> Modern VLSI design : system-onchip design </title> <dc:identifier>ISBN:9780130619709</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14499</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0130619701.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Wolf, Werner.<br /> Upper Saddle River, NJ : Prentice Hall PTR 2002 .<br /> xx, 618 p. ; 24 cm..<br /> 9780130619709 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=14499">Place hold on <em>Modern VLSI design : system-onchip design</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14499</guid> </item> <item> <title> Verification methodology manual for SystemVerilog </title> <dc:identifier>ISBN:9780387255385</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14879</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0387255389.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bergeron, Janick...[et al].<br /> New York : Springer, 2006 .<br /> xvii, 503 p. ; 24 cm..<br /> 9780387255385 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=14879">Place hold on <em>Verification methodology manual for SystemVerilog</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14879</guid> </item> <item> <title> Hickman&#39;s analog and RF circuits </title> <dc:identifier>ISBN:9780750637428</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14947</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0750637420.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Ian Hickman.<br /> Oxford [England] ; Boston : Newnes 1998 .<br /> viii, 299 p. ; 24 cm. .<br /> 9780750637428 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=14947">Place hold on <em>Hickman&#39;s analog and RF circuits</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=14947</guid> </item> <item> <title> The art of analog layout </title> <dc:identifier>ISBN:9780130870612</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=15854</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0130870617.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Hastings, Alan.<br /> Upper Saddle River, NJ : Prentice Hall, 2001 .<br /> xix, 539 p. ; 26 cm..<br /> 9780130870612 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=15854">Place hold on <em>The art of analog layout</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=15854</guid> </item> <item> <title> Advanced ASIC chip synthesis : using Synopsys Design Compiler, Physical Compiler, and PrimeTime </title> <dc:identifier>ISBN:9780792376446</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=16005</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0792376447.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bhatnagar, Himanshu.<br /> Boston : Kluwer Academic Publishers 2002 .<br /> xxiv, 328 p. ; 24 cm.<br /> 9780792376446 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=16005">Place hold on <em>Advanced ASIC chip synthesis</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=16005</guid> </item> <item> <title> A baker&#39;s dozen : real world solutions to real world analog design problems </title> <dc:identifier>ISBN:9780750678193</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=16010</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0750678194.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Baker, Bonnie.<br /> Oxford : Newnes 2005 .<br /> xiii, 347 p. ; 24 cm. .<br /> 9780750678193 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=16010">Place hold on <em>A baker&#39;s dozen </em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=16010</guid> </item> <item> <title> Synchronization of digital telecommunications networks </title> <dc:identifier>ISBN:9780471615507</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=16097</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0471615501.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bregni, Stefano..<br /> Chichester Wiley 2002 .<br /> xxxiii, 395 p. 25 cm..<br /> 9780471615507 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=16097">Place hold on <em>Synchronization of digital telecommunications networks</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=16097</guid> </item> <item> <title> Fundamentals of logic design </title> <dc:identifier>ISBN:9780314922182</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=20426</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0314922180.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Roth, Charles H..<br /> St. Paul : West Pub. Co. 1992 .<br /> xviii, 770 p. ; 26 cm..<br /> 9780314922182 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=20426">Place hold on <em>Fundamentals of logic design</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=20426</guid> </item> <item> <title> Microchip manufacturing </title> <dc:identifier>ISBN:9780961672188</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=21612</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0961672188.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Wolf, Stanley.<br /> Sunset Beach, Calif. Lattice Press 2003 .<br /> xix, 564 p. 25 cm..<br /> 9780961672188 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=21612">Place hold on <em>Microchip manufacturing</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=21612</guid> </item> </channel> </rss>
