<?xml version="1.0" encoding="utf-8" ?> <rss version="2.0" xmlns:opensearch="http://a9.com/-/spec/opensearch/1.1/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:atom="http://www.w3.org/2005/Atom"> <channel> <title> <![CDATA[SNU Library Search for 'index-term-genre:&quot; VHDL (Computer hardware description language) &quot;']]> </title> <link> https://library.snu.edu.in/cgi-bin/koha/opac-search.pl?q=ccl=index-term-genre%3A%22%20VHDL%20%28Computer%20hardware%20description%20language%29%20%22&#38;sort_by=&#38;format=rss </link> <atom:link rel="self" type="application/rss+xml" href="https://library.snu.edu.in/cgi-bin/koha/opac-search.pl?q=ccl=index-term-genre%3A%22%20VHDL%20%28Computer%20hardware%20description%20language%29%20%22&#38;sort_by=&#38;format=rss"/> <description> <![CDATA[ Search results for 'index-term-genre:&quot; VHDL (Computer hardware description language) &quot;' at SNU Library]]> </description> <opensearch:totalResults>9</opensearch:totalResults> <opensearch:startIndex>0</opensearch:startIndex> <opensearch:itemsPerPage>50</opensearch:itemsPerPage> <atom:link rel="search" type="application/opensearchdescription+xml" href="https://library.snu.edu.in/cgi-bin/koha/opac-search.pl?q=ccl=index-term-genre%3A%22%20VHDL%20%28Computer%20hardware%20description%20language%29%20%22&#38;sort_by=&#38;format=opensearchdescription"/> <opensearch:Query role="request" searchTerms="q%3Dccl%3Dindex-term-genre%253A%2522%2520VHDL%2520%2528Computer%2520hardware%2520description%2520language%2529%2520%2522" startPage="" /> <item> <title> VHDL for programmable logic </title> <dc:identifier>ISBN:9780201895735</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11772</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0201895730.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Skahill, Kevin.<br /> Reading, Mass. : Addison-Wesley, 1996 .<br /> xiv, 593 p. ; 24 cm. .<br /> 9780201895735 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=11772">Place hold on <em>VHDL for programmable logic</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=11772</guid> </item> <item> <title> Chip-level modeling with VHDL </title> <dc:identifier>ISBN:0131331906</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12281</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0131331906.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Armstrong, James R..<br /> Englewood Cliffs, N.J. : Prentice Hall, 1989 .<br /> x, 148 p. ; 24 cm..<br /> 0131331906 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=12281">Place hold on <em>Chip-level modeling with VHDL</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=12281</guid> </item> <item> <title> VHDL </title> <dc:identifier>ISBN:9780070445406</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13158</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0070445400.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Perry, Douglas L..<br /> New York : McGraw-Hill 1998 .<br /> xvi, 493 p. ; 25 cm.<br /> 9780070445406 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13158">Place hold on <em>VHDL</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13158</guid> </item> <item> <title> VHDL design representation and synthesis </title> <dc:identifier>ISBN:9780130216700</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13801</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0130216704.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By James R Armstrong | / F Gail Gray.<br /> Upper Saddle River, NJ : Prentice Hall PTR 2000 .<br /> xv, 651 p. ; 25 cm. .<br /> 9780130216700 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=13801">Place hold on <em>VHDL design representation and synthesis</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=13801</guid> </item> <item> <title> A VHDL primer </title> <dc:identifier>ISBN:9780130965752</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=21856</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0130965758.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Bhasker, Jayaram.<br /> Upper Saddle River, NJ. Prentice Hall 1999 .<br /> xx, 373 p. 24 cm..<br /> 9780130965752 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=21856">Place hold on <em>A VHDL primer</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=21856</guid> </item> <item> <title> The designer&#39;s guide to VHDL </title> <dc:identifier>ISBN:9788181471925</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=23036</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/818147192X.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Ashenden, Peter J..<br /> an Francisco, CA : Morgan Kaufmann, 2002 .<br /> xxiv, 759 p. ; 24 cm..<br /> 9788181471925 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=23036">Place hold on <em>The designer&#39;s guide to VHDL</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=23036</guid> </item> <item> <title> HDL chip design : a practical guide for designing, synthesizing, and simulating ASICs and FPGAs using VHDL or Verilog </title> <dc:identifier>ISBN:9780965193438</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=23192</link> <description> <![CDATA[ <p> By Smith, Douglas J. | Zamfirescu, Alex.<br /> Madison, AL Doone Publications 1996 .<br /> xvi, 448 p. 29 cm..<br /> 9780965193438 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=23192">Place hold on <em>HDL chip design</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=23192</guid> </item> <item> <title> VHDL analysis and modeling of digital systems </title> <dc:identifier>ISBN:9780070464797</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=23233</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/0070464790.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Navabi, Zainalabedin.<br /> New York ; McGraw-Hill, 1998 .<br /> xxii, 632 p. ; 24 cm..<br /> 9780070464797 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=23233">Place hold on <em>VHDL </em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=23233</guid> </item> <item> <title> Digital systems design using VHDL </title> <dc:identifier>ISBN:9789812400529</dc:identifier> <link>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=33428</link> <description> <![CDATA[ <img src="https://images-na.ssl-images-amazon.com/images/P/9812400524.01.TZZZZZZZ.jpg" alt="" /> ]]> <![CDATA[ <p> By Roth Jr., Charles H..<br /> Boston, MA PWS Pub. Co. 1998 .<br /> x, 470 p. ; 25 cm..<br /> 9789812400529 </p> ]]> <![CDATA[ <p> <a href="https://library.snu.edu.in/cgi-bin/koha/opac-reserve.pl?biblionumber=33428">Place hold on <em>Digital systems design using VHDL</em></a> </p> ]]> </description> <guid>https://library.snu.edu.in/cgi-bin/koha/opac-detail.pl?biblionumber=33428</guid> </item> </channel> </rss>
