| 000 | 00833nam a22002297a 4500 | ||
|---|---|---|---|
| 003 | SNU | ||
| 005 | 20140622095050.0 | ||
| 008 | 140622b xxu||||| |||| 00| 0 eng d | ||
| 020 | _a9780387270364 | ||
| 028 | _aHCL | ||
| 082 | _a621.392 SPE | ||
| 100 | _aSpear, Chris. | ||
| 245 |
_aSystemVerilog for verification _b : a guide to learning the testbench language features _c/ Chris Spear |
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| 260 |
_a New York, NY _b: Springer, _c©2006. |
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| 300 |
_a xxxiv, 301 p. _b: ill. _c; 25 cm. |
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| 655 | _a Verilog (Computer hardware description language) | ||
| 655 | _aVerilog (Langage de description de matériel informatique) | ||
| 655 | _aIntegrated circuits -- Verification. | ||
| 655 | _aSystemVerilog for verification a guide to learning the testbench language features | ||
| 655 | _aChris Spear | ||
| 942 |
_2ddc _cHCL |
||
| 999 |
_c11685 _d11685 |
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