000			00829nam a22002417a 4500
003			SNU
005			20140731233349.0
008			140731b xxu||||| |||| 00| 0 eng d
020			_a9780130998514
028			_aHCL
082			_a621.395 COF
100			_aCoffman, Ken, 1953-
245			_aReal world FPGA design with Verilog _c/ Ken Coffman
260			_aUpper Saddle River, NJ _bPrentice Hall PTR _c2000
300			_axv, 291 p. _b: ill. _c25 cm.
655			_aField programmable gate arrays -- Computer-aided design.
655			_a Verilog (Computer hardware description language) Field programmable gate array.
655			_aReal world FPGA design with Verilog
655			_aKen Coffman
655			_aCircuits, devices, and systems
655			_aVerilog (Computer hardware description language)
942			_2ddc _cHCL
999			_c21814 _d21814