000 00826nam a22002417a 4500
003 SNU
005 20140804212752.0
008 140804b xxu||||| |||| 00| 0 eng d
020 _a9780792377665
028 _aHCL
082 _a621.3815 BER
100 _aBergeron, Janick
245 _aWriting testbenches
_b: functional verification of HDL models
_c/ Janick Bergeron
260 _aBoston
_bKluwer Academic
_c2000
300 _axxii, 354 p.
_b: ill.
_c24 cm.
655 _aJanick Bergeron
655 _aWriting testbenches : functional verification of HDL models
655 _a Computer hardware description languages.
655 _a Integrated circuits -- Verification.
655 _a TECHNOLOGY & ENGINEERING -- Electronics -- Circuits -- Integrated.
655 _a Electrical engineering.
942 _2ddc
_cHCL
999 _c23038
_d23038