| 000 | 00906nam a22002537a 4500 | ||
|---|---|---|---|
| 003 | SNU | ||
| 005 | 20150325162721.0 | ||
| 008 | 150325b xxu||||| |||| 00| 0 eng d | ||
| 020 | _a9780983497301 | ||
| 028 |
_a:S R Book Distributors _b:12, Satyam Enclave Tejab Mill Compound New Kot Gaon G T Road Ghaziabad _c:1460 _d:23/03/2015 |
||
| 082 | _a621.392 REA | ||
| 100 | _aReadler, Blaine C. | ||
| 245 |
_aVerilog by example _b: a concise introduction for FPGA design _c/ Blaine C Readler |
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| 260 |
_aUSA _b Full Arc Press, _c2011. |
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| 300 |
_a114p. _c24cm. |
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| 365 | _b1307 | ||
| 655 | _a Electronics Engineering | ||
| 655 | _aDigital electronics | ||
| 655 | _aField programmable gate arrays. | ||
| 655 | _aVerilog (Computer hardware description language) | ||
| 655 | _aBlaine C Readler | ||
| 655 | _aand Verilog by example : a concise introduction for FPGA design | ||
| 942 |
_2ddc _cBOOK |
||
| 999 |
_c42140 _d42140 |
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