000 00618nam a22001697a 4500
003 SNU
005 20150821154730.0
008 150819b xxu||||| |||| 00| 0 eng d
100 _aKolla, Varshine
245 _aDesign of Hybrid CMOS/STT-Mram Based Energy Effecient FPGA Building Blocks.
_c\Varshine Kolla
260 _a.-Shiv Nadar University,Dadri
_b:Department of Electrical Engineering
_c,June,2015
300 _a49 p.
_b, Hard Bound
440 _a.-(B.Tech Electrical Engineering)
_n,Under Supervision of Dr. Ramesh Vaddi
655 _aProject Report
655 _aElectrical Engineering
942 _2ddc
_cPR
999 _c44242
_d44242