000 00743nam a22001817a 4500
003 SNU
005 20170116145733.0
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100 _aBnasal,Anant
_aJain, Arihant
245 _aDesign of SUB-IV Process corner and Channel Length Modulation compensated Voltage refrence Generator
_c/ Anant Bnasal & Arihant Jain
260 _a.-Shiv Nadar University,Dadri
_b:Department of Electrical Engineering
_c:May 2016
300 _a53p.
_b, Hard Bound
440 _a.-(B.Tech Electrical Engineering)
_n:,Under Supervision of Dr. Sonal Signal
655 _aElectrical Engineering
655 _aProject Report
856 _uhttp://dspace.snu.edu.in:8080/jspui/handle/123456789/171
942 _2ddc
_cPR
999 _c47352
_d47352