| 000 | 00516nam a2200133Ia 4500 | ||
|---|---|---|---|
| 008 | 250624s9999||||xx |||||||||||||| ||und|| | ||
| 100 | _aSayak Maity | ||
| 245 | 0 | _aFPGA Implementation of a fault-tolerant RISC-V processor | |
| 260 |
_aShiv Nadar University, Dadri _bDepartment of Electrical Engineering, School of Engineering _c2025 |
||
| 300 |
_a22p. _c26cm |
||
| 650 | _aEngineeringElectrical EngineeringElectronics and Communication Engineering | ||
| 700 | _aUnder supervision of Dr. Rakesh Palisetty | ||
| 942 | _cPR | ||
| 999 |
_c63912 _d63912 |
||