Writing testbenches

Bergeron, Janick

Writing testbenches : functional verification of HDL models / Janick Bergeron - Boston Kluwer Academic 2000 - xxii, 354 p. : ill. 24 cm.

9780792377665

HCL


Janick Bergeron
Writing testbenches : functional verification of HDL models
Computer hardware description languages.
Integrated circuits -- Verification.
TECHNOLOGY & ENGINEERING -- Electronics -- Circuits -- Integrated.
Electrical engineering.

621.3815 BER

© Copyright Shiv Nadar University 2012. All Rights Reserved.  Disclaimer |  Sitemap
The Shiv Nadar University has been established under U.P. Act No 12 of 2011. Shiv Nadar University is UGC Approved.