Design Verification and Test of Digital VLSI Circuits:
"Biswas, Santosh" "Deka, Jatindra Kumar"
Design Verification and Test of Digital VLSI Circuits: Introduction to formal methods for design verification / Jatindra Kumar Deka and Santosh Biswas - Guwahati Indian Insitiute of Technology - Video Lecture - NPTEL Lecture Series Computer Science and Engineering Introduction to formal methods for design verification .
"Prof. Jatindra Kumar Deka,Dr. Santosh Biswas"
Computer Science and Engineering
Design Verification and Test of Digital VLSI Circuits
IIT Guwahati
Introduction to formal methods for design verification
NPTEL
Design Verification and Test of Digital VLSI Circuits: Introduction to formal methods for design verification / Jatindra Kumar Deka and Santosh Biswas - Guwahati Indian Insitiute of Technology - Video Lecture - NPTEL Lecture Series Computer Science and Engineering Introduction to formal methods for design verification .
"Prof. Jatindra Kumar Deka,Dr. Santosh Biswas"
Computer Science and Engineering
Design Verification and Test of Digital VLSI Circuits
IIT Guwahati
Introduction to formal methods for design verification
NPTEL
