Design Verification and Test of Digital VLSI Circuits:
"Biswas, Santosh" "Deka, Jatindra Kumar"
Design Verification and Test of Digital VLSI Circuits: ATPG for Synchronous Sequential Circuits / Jatindra Kumar Deka and Santosh Biswas - Guwahati Indian Insitiute of Technology - Video Lecture - NPTEL Lecture Series Computer Science and Engineering ATPG for Synchronous Sequential Circuits .
"Prof. Jatindra Kumar Deka,Dr. Santosh Biswas"
ATPG for Synchronous Sequential Circuits
Computer Science and Engineering
Design Verification and Test of Digital VLSI Circuits
IIT Guwahati
NPTEL
Design Verification and Test of Digital VLSI Circuits: ATPG for Synchronous Sequential Circuits / Jatindra Kumar Deka and Santosh Biswas - Guwahati Indian Insitiute of Technology - Video Lecture - NPTEL Lecture Series Computer Science and Engineering ATPG for Synchronous Sequential Circuits .
"Prof. Jatindra Kumar Deka,Dr. Santosh Biswas"
ATPG for Synchronous Sequential Circuits
Computer Science and Engineering
Design Verification and Test of Digital VLSI Circuits
IIT Guwahati
NPTEL
