Design Verification and Test of Digital VLSI Circuits:
"Biswas, Santosh" "Deka, Jatindra Kumar"
Design Verification and Test of Digital VLSI Circuits: Built in Self Test-2 / Jatindra Kumar Deka and Santosh Biswas - Guwahati Indian Insitiute of Technology - Video Lecture - NPTEL Lecture Series Computer Science and Engineering Built in Self Test-2 .
"Prof. Jatindra Kumar Deka,Dr. Santosh Biswas"
Built in Self Test-2
Computer Science and Engineering
Design Verification and Test of Digital VLSI Circuits
IIT Guwahati
NPTEL
Design Verification and Test of Digital VLSI Circuits: Built in Self Test-2 / Jatindra Kumar Deka and Santosh Biswas - Guwahati Indian Insitiute of Technology - Video Lecture - NPTEL Lecture Series Computer Science and Engineering Built in Self Test-2 .
"Prof. Jatindra Kumar Deka,Dr. Santosh Biswas"
Built in Self Test-2
Computer Science and Engineering
Design Verification and Test of Digital VLSI Circuits
IIT Guwahati
NPTEL