Design of loadless 4T-SRAM cell in 28 nm FDSOI and 28 nm BULK technology for low - power & low - area application.
Venkatesh, N Shivaram
Design of loadless 4T-SRAM cell in 28 nm FDSOI and 28 nm BULK technology for low - power & low - area application. \N Shivaram Venkatesh - Shiv Nadar University,Dadri :Department of Electrical Engineering ,June,2015 - 63 p. , Hard Bound - (M.Tech Electrical Engineering) ,Under Supervision of Dr. G Naveen Babu .
Project Report
Electrical Engineering
Design of loadless 4T-SRAM cell in 28 nm FDSOI and 28 nm BULK technology for low - power & low - area application. \N Shivaram Venkatesh - Shiv Nadar University,Dadri :Department of Electrical Engineering ,June,2015 - 63 p. , Hard Bound - (M.Tech Electrical Engineering) ,Under Supervision of Dr. G Naveen Babu .
Project Report
Electrical Engineering
