A Hierarchically reconfigurable SRAM-based compute-in-memory macro for edge computing
Mahita Yalamanchili
A Hierarchically reconfigurable SRAM-based compute-in-memory macro for edge computing - Shiv Nadar University, Dadri Department of Electrical Engineering, School of Engineering 2025 - 28p. 26cm
EngineeringElectrical EngineeringElectronics and Communication Engineering
A Hierarchically reconfigurable SRAM-based compute-in-memory macro for edge computing - Shiv Nadar University, Dadri Department of Electrical Engineering, School of Engineering 2025 - 28p. 26cm
EngineeringElectrical EngineeringElectronics and Communication Engineering