HDL chip design (Record no. 23192)

MARC details
000 -LEADER
fixed length control field 01129nam a22002657a 4500
003 - CONTROL NUMBER IDENTIFIER
control field SNU
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20140807145423.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 140807b xxu||||| |||| 00| 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9780965193438
028 ## - DISTRIBUTOR NAME
Distributor Name HCL
082 ## - DEWEY DECIMAL CLASSIFICATION
Classification number 621.395 SMI
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Smith, Douglas J.
-- Zamfirescu, Alex
245 ## - TITLE STATEMENT
Title HDL chip design
Remainder of title : a practical guide for designing, synthesizing, and simulating ASICs and FPGAs using VHDL or Verilog
Statement of responsibility, etc / Douglas J. Smith
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc Madison, AL
Name of publisher, distributor, etc Doone Publications
Date of publication, distribution, etc 1996
300 ## - PHYSICAL DESCRIPTION
Extent xvi, 448 p.
Other physical details : ill.
Dimensions 29 cm.
655 ## - INDEX TERM--GENRE/FORM
Genre/form data or focus term Douglas J. Smith
655 ## - INDEX TERM--GENRE/FORM
Genre/form data or focus term HDL chip design : a practical guide for designing, synthesizing, and simulating ASICs and FPGAs using VHDL or Verilog
655 ## - INDEX TERM--GENRE/FORM
Genre/form data or focus term Application-specific integrated circuits (ASIC) -- Computer-aided design.
655 ## - INDEX TERM--GENRE/FORM
Genre/form data or focus term Field programmable gate arrays (FPGA) -- Computer-aided design.
655 ## - INDEX TERM--GENRE/FORM
Genre/form data or focus term Logic design -- Data processing.
655 ## - INDEX TERM--GENRE/FORM
Genre/form data or focus term VHDL (Computer hardware description language)
655 ## - INDEX TERM--GENRE/FORM
Genre/form data or focus term Verilog (Computer hardware description language)
655 ## - INDEX TERM--GENRE/FORM
Genre/form data or focus term Electronics engineering -- Chip design
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme Dewey Decimal Classification
Koha item type HCL Collection
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Home library Current library Date acquired Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type
Withdrawn   Dewey Decimal Classification     SNU LIBRARY SNU LIBRARY 07/08/2014   621.395 SMI H5446 07/08/2014 07/08/2014 HCL Collection
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