Design Verification and Test of Digital VLSI Circuits: (Record no. 33991)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01155nmm a2200253 a 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | SNU |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20140915200247.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 140911s9999 xx 000 0 und d |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | NPTEL |
| Transcribing agency | IIT Guwahati |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | "Biswas, Santosh" |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | "Deka, Jatindra Kumar" |
| 245 ## - TITLE STATEMENT | |
| Title | Design Verification and Test of Digital VLSI Circuits: |
| Remainder of title | Operation on Ordered Binary Decision Diagram |
| Statement of responsibility, etc | / Jatindra Kumar Deka and Santosh Biswas |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT) | |
| Place of publication, distribution, etc | Guwahati |
| Name of publisher, distributor, etc | Indian Insitiute of Technology |
| 300 ## - PHYSICAL DESCRIPTION | |
| Type of unit | Video Lecture |
| 440 ## - SERIES STATEMENT/ADDED ENTRY--TITLE | |
| Title | NPTEL Lecture Series |
| Number of part/section of a work | Computer Science and Engineering |
| Name of part/section of a work | Operation on Ordered Binary Decision Diagram |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | "Prof. Jatindra Kumar Deka,Dr. Santosh Biswas" |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Computer Science and Engineering |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Design Verification and Test of Digital VLSI Circuits |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | IIT Guwahati |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | NPTEL |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name as entry element | Operation on Ordered Binary Decision Diagram |
| 856 ## - ELECTRONIC LOCATION AND ACCESS | |
| Materials specified | Video |
| Uniform Resource Identifier | http://video.snu.edu.in/index.php?id=7287&cat=Computer Science and Engineering&course=Design Verification and Test of Digital VLSI Circuits&url=Phase2_Video/106103116/mod06lec03.mp4 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | NPTEL SNU |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Home library | Current library | Date acquired | Total Checkouts | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | SNU LIBRARY | SNU LIBRARY | 15/09/2014 | 15/09/2014 | 15/09/2014 | NPTEL SNU |
