Programming FPGAs (Record no. 60856)

MARC details
000 -LEADER
fixed length control field 04385nam a22002537a 4500
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20230920121845.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 230920b |||||||| |||| 00| 0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9781259643767
028 ## - DISTRIBUTOR NAME
Distributor Name : Zafaa Book & Distributors
Distributor address : 313/56F, 49A, Anand Nagar, Inderlok, Delhi.
Bill Number : ZBD0148
Bill Date : 15/09/2023
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.395 MON
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Monk, Simon.
245 ## - TITLE STATEMENT
Title Programming FPGAs
Remainder of title : getting started with Verilog.
Statement of responsibility, etc /Simon Monk.
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc , New York, NY
Name of publisher, distributor, etc ; McGraw Hill Education
Date of publication, distribution, etc , 2017.
300 ## - PHYSICAL DESCRIPTION
Extent xiii, 177 pages
Other physical details : illustrations
Dimensions ; 23 cm.
365 ## - TRADE PRICE
Price amount 1879
505 ## - FORMATTED CONTENTS NOTE
Contents note <br/>Machine generated contents note: 1.Logic<br/>Logic Gates<br/>The not Gate<br/>The and Gate<br/>The or Gate<br/>NAND and NOR Gates<br/>XOR Gates<br/>Binary<br/>Adding with Logic<br/>Flip-Flops<br/>Set-Reset Flip-Flop<br/>Shift Registers<br/>Binary Counters<br/>Summary<br/>2.FPGAs<br/>How an FPGA Works<br/>The Elbert 2<br/>The Mojo<br/>The Papilio<br/>Software Setup<br/>Installing ISE<br/>Installing Elbert Software<br/>Installing Mojo Software<br/>Installing Papilio Software<br/>Project Files<br/>Summary<br/>3.Drawing Logic<br/>A Data Selector Example<br/>Step 1 Create a New Project<br/>Step 2 Create a New Schematic Source<br/>Step 3 Add the Logic Symbols<br/>Step 4 Connect the Gates<br/>Step 5 Add the IO Markers<br/>Step 6 Create a User Constraints File<br/>Step 7 Generate the bit File<br/>Step 8 Program Your Board<br/>Testing the Result<br/>A 4-Bit Counter Example<br/>Drawing the Schematic<br/>Implementation Constraints Files<br/>Testing the Counter<br/>Summary<br/>4.Introducing Verilog<br/>Modules<br/>Wires, Registers, and Buses<br/>Parallel Execution<br/>Number Format<br/>Data Selector in Verilog<br/>A Counter in Verilog<br/>Synchronous Logic<br/>Summary<br/>5.Modular Verilog<br/>A Seven-Segment Decoder<br/>Button Debouncing<br/>Multiplexed Seven-Segment Display and Counter<br/>Project Structure<br/>Display_7_seg<br/>Counter_7_seg<br/>User Constraints File<br/>Importing Source Code for Modules<br/>Setting the Top-Level Module<br/>The Three-Digit Version<br/>Testing<br/>Summary<br/>6.Timer Example<br/>State Machines<br/>State Machine Design<br/>Hardware<br/>You Will Need<br/>Construction<br/>Modules<br/>User Constraints File<br/>The Timer Module<br/>Inputs and Outputs<br/>Push Buttons<br/>Alarm Module Instance<br/>Modeling Time and the Display<br/>State Machine Implementation<br/>Tasks<br/>Testing<br/>Summary<br/>7.PWM and Servomotors<br/>Pulse-Width Modulation<br/>A PWM Module<br/>PWM Module Inputs and Outputs<br/>A Tester of the PWM Module<br/>Trying It Out<br/>Servomotors<br/>Hardware<br/>You Will Need<br/>Construction<br/>A Servo Module<br/>Summary<br/>8.Audio<br/>Simple Tone Generation<br/>Audio Output from the Mojo<br/>A General-Purpose Tone/Frequency Generator<br/>The Tone Module<br/>The tone tester Module<br/>Testing<br/>Playing an Audio File<br/>Audio Files<br/>RAM<br/>The wav_player Module<br/>Testing<br/>Preparing Your Own Sounds<br/>Summary<br/>9.Video<br/>VGA<br/>VGA Timings<br/>Drawing Rectangles<br/>A VGA Module<br/>VGA and the Elbert 2<br/>Making Things Move<br/>A Memory-Mapped Display<br/>Preparing an Image<br/>Summary<br/>10.What Next<br/>Simulation<br/>Under the Hood<br/>Cores and Soft Processors<br/>More on the Papilio<br/>More on the Mojo<br/>Summary<br/>A.Resources<br/>Buying FPGA Boards<br/>Components<br/>Other FPGA Boards<br/>Web Resources<br/>B.Elbert 2 Reference<br/>ISE New Project Settings<br/>Prototype Net Mapping<br/>LEDs<br/>Three-Digit Display<br/>DIP Slide Switches<br/>Push Switches<br/>VGA<br/>Audio and Micro-SD<br/>GPIO Pins<br/>Header P1<br/>Header P6<br/>Header P2<br/>Header P4<br/>Clock<br/>C.Mojo Reference<br/>ISE New Project Settings<br/>NET Mapping (IO Shield)<br/>LEDs<br/>Four-Digit Display<br/>Slide Switches<br/>Push Buttons<br/>Clock Pin<br/>Complete UCF for IO Shield<br/>D.Papilio One Reference<br/>ISE New Project Settings<br/>LogicStart MegaWing NET Mapping<br/>LEDs<br/>Four-Digit Display<br/>DIP Slide Switches<br/>Joystick Switches<br/>VGA<br/>Audio<br/>Analog-to-Digital Converter<br/>Clock Pin<br/>GPIO Pins
520 ## - SUMMARY, ETC.
Summary, etc "This fun guide shows how to get started with FPGA technology using the popular Mojo, Papilio One, and Elbert 2 boards. Written by electronics guru Simon Monk, Programming FPGAs: Getting Started with Verilog features clear explanations, easy-to-follow examples, and downloadable sample programs. You'll get start-to-finish assembly and programming instructions for numerous projects, including an LED decoder, a timer, a tone generator - even a memory-mapped video display! The book serves both as a hobbyists' guide and as an introduction for professional developers."
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Field programmable gate arrays
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Verilog
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Drawing Logic
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element Modular Verilog
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Simon Monk
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Books
Holdings
Withdrawn status Lost status Source of classification or shelving scheme Damaged status Not for loan Home library Current library Date acquired Source of acquisition Cost, normal purchase price Total Checkouts Total Renewals Full call number Barcode Date last seen Date checked out Price effective from Koha item type
    Dewey Decimal Classification     SNU LIBRARY SNU LIBRARY 20/09/2023 Zafaa Books 1879.00 1 2 621.395 MON 29569 05/06/2025 18/12/2024 20/09/2023 Books
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