FPGA Implementation of a fault-tolerant RISC-V processor (Record no. 63912)

MARC details
000 -LEADER
fixed length control field 00516nam a2200133Ia 4500
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 250624s9999||||xx |||||||||||||| ||und||
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Sayak Maity
245 #0 - TITLE STATEMENT
Title FPGA Implementation of a fault-tolerant RISC-V processor
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc Shiv Nadar University, Dadri
Name of publisher, distributor, etc Department of Electrical Engineering, School of Engineering
Date of publication, distribution, etc 2025
300 ## - PHYSICAL DESCRIPTION
Extent 22p.
Dimensions 26cm
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element EngineeringElectrical EngineeringElectronics and Communication Engineering
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name Under supervision of Dr. Rakesh Palisetty
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type Project Report
Holdings
Withdrawn status Lost status Damaged status Not for loan Home library Current library Date acquired Total Checkouts Barcode Date last seen Price effective from Koha item type Public note
      Not For Loan SNU LIBRARY SNU LIBRARY 24/06/2025   TH1066 24/06/2025 24/06/2025 Project Report UG Project Report 2025
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