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Processor Design: From Specification to Gate- Level Netlist Realization (Record no. 62275)

MARC details
000 -LEADER
fixed length control field	00661nam a22001817a 4500
005 - DATE AND TIME OF LATEST TRANSACTION
control field	20240903135838.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field	240903b \|\|\|\|\|\|\|\| \|\|\|\| 00\| 0 eng d
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name	Aditi Sharma
245 ## - TITLE STATEMENT
Title	Processor Design: From Specification to Gate- Level Netlist Realization
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc	" Shiv Nadar Institution of Eminence"
Name of publisher, distributor, etc	"Department of Electrical and Electronic Engineering, School of Engineering"
Date of publication, distribution, etc	April 2024.
300 ## - PHYSICAL DESCRIPTION
Extent	66p.
Dimensions	: 26cm.
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element	Engineering
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element	Electrical Engineering
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element	Electrical and Electronics Engineering
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical term or geographic name as entry element	B.Tech.
700 ## - ADDED ENTRY--PERSONAL NAME
Personal name	Under Supervision of Dr. Venkatnarayan Hariharan
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Koha item type	Project Report

Holdings
Withdrawn status	Lost status	Source of classification or shelving scheme	Damaged status	Not for loan	Home library	Current library	Date acquired	Total Checkouts	Barcode	Date last seen	Price effective from	Koha item type	Public note
		Dewey Decimal Classification			SNU LIBRARY	SNU LIBRARY	03/09/2024		TH941	03/09/2024	03/09/2024	Project Report	UG Project Report 2024