APA

Aditi Sharma, Under Supervision of Dr. Venkatnarayan Hariharan, . (2024). Processor Design: From Specification to Gate- Level Netlist Realization. " Shiv Nadar Institution of Eminence": "Department of Electrical and Electronic Engineering, School of Engineering".

Chicago

Aditi Sharma, Under Supervision of Dr. Venkatnarayan Hariharan, . 2024. Processor Design: From Specification to Gate- Level Netlist Realization. " Shiv Nadar Institution of Eminence": "Department of Electrical and Electronic Engineering, School of Engineering".

Harvard

Aditi Sharma, Under Supervision of Dr. Venkatnarayan Hariharan, . (2024). Processor Design: From Specification to Gate- Level Netlist Realization. " Shiv Nadar Institution of Eminence": "Department of Electrical and Electronic Engineering, School of Engineering".

MLA

Aditi Sharma, Under Supervision of Dr. Venkatnarayan Hariharan, . Processor Design: From Specification to Gate- Level Netlist Realization. " Shiv Nadar Institution of Eminence": "Department of Electrical and Electronic Engineering, School of Engineering". 2024.